MATLAB: How to create a FFT ipcore for Zynq using Simulink HDL Coder
HDL Coderzynq
there is an error message "not support for frame based module"? is there any other solution for exporting signal processing blocks to Zynq?
Thank
Owen
Best Answer
A frame-based block takes an entire array of data as an input in one time step. This is not very hardware friendly; for hardware, you need to stream your data in one array element at a time. HDL Coder has a "HDL Streaming FFT" block and a "HDL FFT" block designed specifically for hardware implementation. You will need to modify your design to interface with one of these blocks. To access this block in R2013a:
>> hdllib
This library contains all blocks that support HDL code generation.
Double-click on "HDL Demo Library".
Choose the "HDL Streaming FFT" or "HDL FFT" block.
A more direct route to the block is to open the HDL Demo Library directly:
Yes, Simulink designs with Xilinx System Generator blocks can be taken to a FPGA bitstream, either as a standalone workflow, or integrated with HDL Coder. Consult the Xilinx documentation for more details.
Best Answer