MATLAB: HDL Stream FFT in HDL Coder 2013b, not support FPGA

HDL Coderstream fftzynq

Hi, i am using Stream FFT for Zynq, but once i have created the subsystem and set it to Atomic, i have this error message pop up: " Double or single port type is not supported when the input parameter 'Target Platform' is set to any FPGA board. Please update the data type on inport"

i have tried to config the input port to "uint32",but another error occur: "Error in 'coder_fft/Subsystem/HDL Streaming FFT1/FFTCore/SimulinkFFT': Unsigned fixed-point signals must be real."

how should i config these block in order to generate an ipcore for Zynq? should i add more data type converters into the system?

Thanks

Owen

Best Answer

Hi Owen,

The HDL Streaming FFT block only support signed fixed-point data type as input. You can try change your input data type to int32.

Thanks,

Wang

Related Solutions

MATLAB: How to create a FFT ipcore for Zynq using Simulink HDL Coder

A frame-based block takes an entire array of data as an input in one time step. This is not very hardware friendly; for hardware, you need to stream your data in one array element at a time. HDL Coder has a "HDL Streaming FFT" block and a "HDL FFT" block designed specifically for hardware implementation. You will need to modify your design to interface with one of these blocks. To access this block in R2013a:

 >> hdllib

This library contains all blocks that support HDL code generation.

Double-click on "HDL Demo Library".
Choose the "HDL Streaming FFT" or "HDL FFT" block.

A more direct route to the block is to open the HDL Demo Library directly:

 >> hdldemolib

MATLAB: HDL generator problems

Simulink HDL Coder currently does not support this particular block (FFT block in Signal Processing Blockset). To find all the blocks supported by Simulink HDL Coder, type "hdllib" from MATLAB prompt.

There are 2 FFT blocks in HDL demo library that you can use for HDL code generation. "HDL Streaming FFT" block supports the Radix-2 with decimation-in-frequency (DIF) algorithm. "HDL FFT" block implements a minimum resource FFT architecture and supports the Radix-2 with decimation-in-time (DIT) algorithm.

John

Best Answer

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MATLAB: How to create a FFT ipcore for Zynq using Simulink HDL Coder

MATLAB: HDL generator problems

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