MATLAB: Do I get a sample time mismatch error in the test harness that has a bus input

Question

Why do I get a sample time mismatch error in my test harness that has a bus input? 

I created a test harness for a subsystem which has a bus signal as input. I am providing a test sequence as an input, which has discrete sample time signals. When I attempt to run the simulation in the harness, I encounter the following error message.

 

Sample time mismatch. Sample time (0.001) of the signal at output port 1 of 'subsystemName_Harness1/Test Sequence' does not match the sample time (0) specified for this signal by the bus element in the bus object 'busName'. The bus object is resolved to the output port of 'subsystemName_Harness1/Input Conversion Subsystem/SigSpec1'. To eliminate this mismatch, consider changing the bus element property or the mismatching block settings.

I cannot change the sample times in the "Input Conversion Subsystem" because all the settings are grayed out. How can I fix this problem?

Answer 1

This error is typically encountered if the sample times of the signals in the original Simulink model are different than the signals that are used in the test harness. For instance, in the Simulink model, if the signals entering the Subsystem have a continuous sample time, this property is going to be incorporated into the test harness once it is created. When signals with discrete sample times are connected to the harness, this will cause the error message. 

In order to avoid this issue, the input signals to the original Subsystem should have the same sample time as the signals that are to be used in the test harness.