MATLAB: About HDL Coder in Simulink

HDL Codersimulink

Hello,

I am trying to generate HDL code from simulink. I have connected contant block as input to discrete integrator and getting ramp output. But when i convert to HDL Code, its not generating except library name, entity name and architecture lines. Can you please help me solving this problem..?

Thank you

Regards Prashanth

Best Answer

I suspect that you have three blocks in your model, the third being a terminator, a scope, or something else that doesn't generate HDL code. And, you are generating code for the entire model. The use of a terminator/scope/etc. block indicates that you don't care about the signal output connected to it, so HDL Coder removes the blocks that feed into the terminator. You end up with no blocks or code in your design.

If this is the case, change the terminator/scope/etc. to an output port (or add an output port in parallel to the e.g. scope) and you will get the code that you were expecting.

Alternatively, place just the blocks you want to generate HDL code for into a subsystem, and generate code for that subsystem.

Related Solutions

MATLAB: Can you generate HDL Code for a subsystem with the reshape block with its output dimensionality set to ‘Derive from reference input port’

This is supported as of MATLAB R2017b.

For releases prior to MATLAB R2017b, HDL code generation is not supported for the reshape block when its output dimensionality is set to 'Derive from reference input port'. The main reason for this is that HDL Code generation does not expect this block to have 2 input ports and thus throws the following error: Found more than one input or output port for a wiring block.

The workaround for this scenario is to use one of the other output dimensionality settings such as 1-D array, Column vector, Row vector or Customize. These options reduce the number of input ports to one and are therefore compatible with HDL code generation.

MATLAB: How to create a FFT ipcore for Zynq using Simulink HDL Coder

A frame-based block takes an entire array of data as an input in one time step. This is not very hardware friendly; for hardware, you need to stream your data in one array element at a time. HDL Coder has a "HDL Streaming FFT" block and a "HDL FFT" block designed specifically for hardware implementation. You will need to modify your design to interface with one of these blocks. To access this block in R2013a:

 >> hdllib

This library contains all blocks that support HDL code generation.

Double-click on "HDL Demo Library".
Choose the "HDL Streaming FFT" or "HDL FFT" block.

A more direct route to the block is to open the HDL Demo Library directly:

 >> hdldemolib

Best Answer

Related Solutions

MATLAB: Can you generate HDL Code for a subsystem with the reshape block with its output dimensionality set to ‘Derive from reference input port’

MATLAB: How to create a FFT ipcore for Zynq using Simulink HDL Coder

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