Lets get something out of the way first: The threshold, or turn-on voltage, is not really an intrinsic device property per se. It originates more from a desire by circuit designers to have a rule of thumb about how much a diode has to be forward biased to get it into conduction mode. As such, one takes the inherently non-linear current vs voltage response of the diode, pick an operating regime where enough current is flowing for your purposes, and linearly project back down to the voltage axis. You are now approximating a diode by being off (no conduction) up to the threshold, than a resistor (linear I vs V) at voltages above that. Given this, it is not obvious why or how the threshold should be related to semiconductor physics in a simple way.
First, a digression on Shockly-Read-Hall generation/recombination theory:
Sze covers this in chapter 1, giving in equation 58 the recombination rate for a single defect level as (lets hope my Tex-fu is up to this):
$$U = \frac{\sigma_p \sigma_n v_{th} (pn-n^{2}_{i})N_t}{\sigma_n\left[n+n_i \exp(\frac{E_t - E_i}{kT})\right] + \sigma_p\left[p+n_i\exp(-\frac{E_t-E_i}{kT})\right]} $$
where $\sigma$ is the hole/electron capture cross section, $v_{th}$ is the carrier thermal velocity, $N_t$ is the trap density, $E_t$ is the trap energy level, $E_i$ is the intrinsic Fermi level, and $n_i$ is the intrinsic carrier density.
With that horror equation written down, one might begin to see how un-simple this problem is. Furthermore, that ugly equation assumes a single trap state. However, there may be more than one trap, and the trap concentrations may be a function of the Fermi level, temperature, etc., piling horror on horror.
Now, lets first look at two operating modes of the diode.
Reverse biased. Here, the junction is reversed biased, not so hard as to lead to avalanche breakdown. There is the built-in potential plus the applied potential across the depletion region. The diode is now under non-equilibrium conditions where $pn \ll n^{2}_{i}$ so there are no free carriers to get significant drift or diffusion contributions to the current in the junction itself. Instead, the reverse current comes from carrier generation in the depletion region, and those generated carriers are then swept out by the applied field. Throwing out the $p$ and $n$ terms, one is left (eq. 47 in chapter 2 of Sze) with the generation rate being proportional to the intrinsic carrier concentration $n_i$ and a bunch of remaining parameters that can look like a lifetime. So far so good. So, the reverse current can now be represented as the generation rate ($n_i/\tau$) and the width of the depletion region. But wait, the width of the depletion region depends on the doping profiles and the applied voltage, so it can vary as $(V_{bi} + V)^{1/n}$ where $n$ can be between 2 and 3. Furthermore, there may be diffusion components in the neutral regions, leading to (equation 50 in chapter 2 of Sze): $J_R = q\sqrt{\frac{D_p}{\tau_p}}\frac{n^{2}_{i}}{N_D} + \frac{qn_i W}{\tau}$. Which term dominates depends on the intrinsic carrier concentration, diffusion coefficient, and generation lifetime.
Forward bias. Here, the major SRH term is the capture processes as holes and electrons are driven together in the junction to recombine, leading to the observed current flow. We now have in the junction that $pn = n^{2}_{i}\exp[\frac{q(\phi_p - \phi_n)}{kT}]$ where $\phi_p$ and $\phi_n$ are the quasi-Fermi levels for holes and electrons. Plugging that in to the SRH equation above yields an unholy mess I won't attempt to replicate here, but is equation 51 in chapter 2 of Sze. Under some simplifying assumptions, one gets that $U = \frac{1}{2} \sigma v_{th} N_t n_i \exp(\frac{qV}{2kT})$. But, the diffusion current portion is still proportional to $\exp(\frac{qV}{kT})$ so the overall forward current is proportional to $\exp(\frac{qV}{nkT})$ where n can be between 1 and 2 depending on how important diffusion vs recombination is in a particular semiconductor material and device geometry.
So, the threshold voltage is somehow related to how the reverse biased case above transitions into the forward bias case. One would expect it to vary depending on the material and the junction design, as well as the 'normal' operating condition that the designer is calibrating their rule-of-thumb to.
So, stick with 0.7V for a silicon diode, unless of course it doesn't work out for your particular diode and circuit...
Best Answer
TL;DR The diode in your schematic is called a Zener diode. Without the diode, the voltage drop on the $5 \text{ k}\Omega$ resistor would be $80 \text{ V}$. However, the Zener diode clamps that voltage to $60 \text{ V}$ by shunting as much current as necessary in the reverse-bias direction. From this information you can calculate all currents in your circuit.
A Zener diode is a type of diode designed to allow current to flow in the opposite direction, i.e. when the diode is reverse-biased. When forward-biased the diode's voltage drop is standard $0.7 \text{ V}$, and when reverse-biased the diode's maximum voltage drop is as indicated on the schematic. Ideally, Zener diodes behave as follows:
In reality this voltage drop depends on the reverse current magnitude; graphs are usually provided in the diode datasheet. Zener diodes are often used as (cheap) voltage references or voltage regulators where only small current is needed.
Figure: Zener diode I-V characteristics (Source)