MATLAB: Does the ‘Unit Delay’ block with a bus signal input display “0:B” as the sorted order in Simulink 6.6 (R2007a)

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I have a model in which a bus signal is fed as the input to my Unit Delay block. When I update the diagram to see the block sorted order, I see that, the sorted order is displayed as "0:B" on this Unit Delay block. The documentation states that:

If a bus is connected to a block's input, Simulink displays the block's sorted order as s:B, e.g., 0:B indicates that the block belongs to the root system's execution context and has a bus connected to its input.

I want to see the order number and not "B".

Best Answer

This bug has been fixed in Release 2007b (R2007b). For previous product releases, read below for any possible workarounds:

The reason for this, is that the operation the block performs on the bus might depend on how the signals in the bus are connected. It is not possible to include that information in this display, so we display a simple s:B on the block. All bus enabled blocks display this type of sorted order. To see what is really going on, download the attached model and execute the following in MATLAB:

bus_sorting_demo

Notice the Unit Delay block. When you update diagram and (Ctrl+D) you will see it has the sorted order 0:B. Now debug the model, by executing the commands below:

sldebug(bdroot)
slist

Look for the Unit Delay block in the sorted order, now it is actually 5 blocks. Thus, a Unit Delay is applied for each signal in the bus, and the orders of these five delays are different from each other.

Stop debugging by executing the command below:

stop

Related Solutions

MATLAB: Is the sorted order not displayed on the Sum block when one of the inputs is a Unit Delay block, in Simulink 7.4 (R2007a)

This is expected behavior and is a result of Block Reduction Optimization. In this model, the construct is a Sum block connected to the Unit Delay. Simulink recognizes this as an accumulator, and these two blocks are combined. As a result the Sum block does not dispay a separate sorted order.

To turn off the above optimization, uncheck 'Block Reduction' from Simulation->Configuration Parameters->Optimization.

MATLAB: What is the difference between the Mux (Demux) and Bus Creator (Bus Selector) blocks in Simulink

This enhancement has been incorporated in Release 2008b (R2008b). For previous product releases, read below for any possible workarounds:

The main difference between mux signals and bus signals is that the components of a bus signal can include more than one data type and can be hierarchical, while the components of a mux signal must all have the same data type and cannot be hierarchical. The documentation of Composite Signals explains this distinction:

 <http://www.mathworks.com/help/releases/R2012b/simulink/composite-signals.html>

Buses can provide consistency checking with the use of a Bus Object, but muxes cannot. Please refer the following for more information:

 <http://www.mathworks.com/help/releases/R2012b/simulink/ug/using-bus-objects.html>

Buses can be realized as structures in generated code, but muxes cannot. See:

 <http://www.mathworks.com/help/releases/R2012b/simulink/slref/buscreator.html>

MathWorks strongly discourages mixing muxes and buses. For example, do not use Mux blocks as Bus Creators. See:

 <http://www.mathworks.com/help/releases/R2013a/simulink/ug/avoiding-mux-bus-mixtures.html>

The Demux block has a Bus Selector mode. For information about when to use this mode, see:

 <http://www.mathworks.com/help/releases/R2012b/simulink/slref/demux.html>

Using a Bus Selector block, you can change the order of signals. This cannot be done with a Demux block. An example is attached to this solution (bus_mux_vec.mdl). In bus_mux_vec.mdl model, the order of the two input signals going through the Bus Creator and the Bus Selector blocks has been changed. After running the model, you will see [1 2 3 4] in Scope1, not [5 6 7 8]. However, the order of the two input signals going through the Mux and Demux blocks cannot be changed, so you will always see [5 6 7 8] in Scope1. For more information on how to change the order of signals using a Bus Selector block, see:

 <http://www.mathworks.com/help/releases/R2012b/simulink/slref/busselector.html>

Although the Demux block cannot rearrange the order of muxed signals, the Signal Selector block can. See:

 <http://www.mathworks.com/help/releases/R2012b/simulink/slref/selector.html>

Bus signals that are hierarchical or include components of different data types can drive only Bus Capable blocks. See:

 <http://www.mathworks.com/help/releases/R2012b/simulink/ug/bus-capable-blocks.html>

This limitation does not apply to a mux signal as long as the Mux block inputs are vectors or vector-like. A vector-like signal is any signal that is a scalar (one-element vector), a vector, or a single-column or single-row matrix. For example, a muxed signal can drive a Gain block, while a bus cannot. See:

 <http://www.mathworks.com/help/releases/R2012b/simulink/slref/mux.html>

For a list of Simulink virtual and conditionally virtual buses, see:

 <http://www.mathworks.com/help/releases/R2012b/simulink/ug/virtual-and-nonvirtual-buses.html>

The Bus Selector block supports matrix inputs. The Demux block does not support matrix inputs unless you double click on the Demux block and check "Bus selection mode". Run the attached model, bus_mux_matrix.mdl. It should work correctly. However, if you double click on the Demux block, uncheck "Bus selection mode" and run the model, it will generate an error.

The Bus Selector block has an option labeled 'muxed output'. This option is mislabeled: the output is a Bus and should be treated as such. Refer to the Related Solution for more information on this feature.

Best Answer

Related Solutions

MATLAB: Is the sorted order not displayed on the Sum block when one of the inputs is a Unit Delay block, in Simulink 7.4 (R2007a)

MATLAB: What is the difference between the Mux (Demux) and Bus Creator (Bus Selector) blocks in Simulink

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