Hello, I am working with the ZedBoard, HDL coder and embedded coder. In order to be able to interact with the IP created by Simulink in parallel from the two ARM cores, I would like to add an additional AXI interface both to the Simulink IP and to the SW interface. Does anyone know how to do that? I created a bridge IP in the reference design in Vivado connected to the Simulink IP but I don't know how I can add this second AXI interface to be accessible from the SW model.
Thanks!
Juan
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