MATLAB: Simulations from an FPGA

fpgaHDL Coder

Hello Everyone,

This might sound like a silly question.

I want to program an FPGA using Simulink and HDL Coder/Verifier. Is it possible to use Simulink again to read the output from the FPGA? Or do I need to use another simulator like Cadence?

Best Answer

HDL Verifier has FPGA-in-the-loop simulation capability that will do just what you are asking about. You will need to use one of the set of supported FPGA prototyping boards. See the HDL Verifier documentation for more details on supported boards, setup and configuration process, and so forth.

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MATLAB: Altera FPGAs

Hi Natalie,

Yes, you need a separate Altera FPGA board to prototype Altera Arria II Gx FPGA.

Altera FPGA boards are supported starting in R2012a release. HDL Coder and HDL Verifier support the following Altera development boards. You can use the first one in the list to prototype Arria FPGA.

    Altera Arria II GX FPGA development kit
    Altera Cyclone III FPGA development kit
    Altera Cyclone IV GX FPGA development kit
    Altera DE2-115 development and education board

Link to the document: http://www.mathworks.com/help/toolbox/hdlcoder/rn/bqmfe_z-10.html#btbo0bg-1

Thanks, Wang

MATLAB: HDL Coder and HDL Verifier

I cannot answer question 1: I'm not familiar with the development boards.

For question 2: HDL Coder's Workflow Advisor is integrated with Xilinx ISE and Altera Quartus. You can generate code with HDL Coder, but you cannot automatically set up projects and run other synthesis tools, either from Synopsys or from another vendor.

For question 3: HDL Verifier has two separate modes: one co-simulates with a HDL simulator, and the other uses FPGA-in-loop simulation. Both of these require Simulink as the master simulator. They differ in the fashion that your generated HDL is exercised. With cosimulation, your HDL is simulated by a 3rd-party HDL simulator. With FIL, your synthesized HDL code is loaded onto a FPGA located on one of a set of supported FPGA development boards, and the programmed FPGA participates in your Simulink simulation.

For question 4: yes, this is the supported method. Your FPGA development board is typically connected by USB or Ethernet to your host PC. This connection is used both for programming the FPGA on the board and for FIL simulation.

Best Answer

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MATLAB: Altera FPGAs

MATLAB: HDL Coder and HDL Verifier

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