In a model we are trying to build for rapid prototyping bypass we have a mux block that has a bunch of signals going to it. Whenever we try to make the output signal of the mux block have a storage class and build it we get the following error:
The signal attribute {StorageClass = 'ImportedExtern'} specified on the line originating from the output port 1 of HVM_model/Function-Call Subsystem/VaVITC_U_HV_BatCellVolt/Mux is invalid because the individual signals contained in this line are mapped to different memory locations. The StorageClass for this line must be set to 'Auto'
But if we place a convert block after the mux then make the signal after the convert imported_extern it is able to build.
It also seems that this mux block is messing with the values of the incoming signals. We checked the outputs of several ehooks read blocks and verified that the signal is being read in properly but when all of these signals are put together with a mux all of the valuesare changed to a static value ogf 66, which is very wrong. Any insight on why this is happening would be greatly appreciated.
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