Hi,
I want to use the state port for initial value of the integrator when it resets. However, I get an error message when I treat it like the output port by adding it with a sumblock to equal-sized state vector, by using a delay block on the signal. The following message occurs regularly:
State ports can only be used to break algebraic loops or to "hand-off" states between systems.Use the output port rather than the state port of 'untitled/Integrator' as the source of the signal routed (either by direct or virtual connection) to 'untitled/Sample and Hold'
Can someone elaborate on what the state port exactly is? I don't really understand from what I can find about on the internet.
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