In my model, I use many virtual buses to improve the visual clarity of my model. I need to pass one of these buses into the subsystem used for the Control Law Accelerator subsystem for my TI C2000 board.
I am following the examples: https://www.mathworks.com/help/releases/R2020a/supportpkg/texasinstrumentsc2000/ug/using-the-control-law-accelerator-cla.html (Using the Control Law Accelerator)
However, if I try to pass the bus in and assign it the tic2000demospkg.Signal with storage class CpuToCla1MsgRAM, it errors out with"
The Simulink signal object specified on the line originating from 'Output Port1' of CLA_virtual_bus/c;a_subsystem/In2 is invalid because it cannot be uniquely mapped to a valid signal in the model. Consider inserting a Signal Conversion block after the output port and specifying the signal object on the output of the Signal Conversion block instead.
How can I use a bus with the CLA subsystem?
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