MATLAB: How to generate HDL code from a masked subsystem that is not at the model’s root level in Simulink

Question

I have model with several hierarchical subsystems, a number of which are masked. I would like to generate HDL code from a masked subsystem that is in the second level of the model, i.e. top_level/subsystem. However, when I try to generate HDL code for this subsystem, I observe the following error:

Masked subsystems are not supported as a non-top level DUT subsystem for HDL code generation.

What is going on here? Is it possible to generate code from the subsystem?

Answer 1

This is a restriction of HDL code generation, and is noted in the documentation, which clarifies that "top-level" refers to the top-level of the model, not the DUT (device under test):

http://www.mathworks.com/help/releases/R2017a/hdlcoder/ref/subsystem.html#bu48xzy

Fortunately, there are workarounds that bring the subsystem to the top-level of a model. To do so, you must consider relevant limitations:

- When you generate HDL code, the input and output type of the subsystem inports/outports matter, so it if the model does not contain that information (e.g., if you place subsystems in new models that leave the inports and outports unconnected), it is necessary to explicitly specify it.

- Similarly, the configuration parameters of model affect code generation. If you place the DUT in a different model, it should refer to the same configuration set, as detailed below.

With these items in mind, there are several possible approaches:

1. Expand the subsystems that are higher up in the hierarchy to bring the subsystem of interest to the root level of the model

If you do not want to lose the nice structure of the model, you should save a backup that preserves the hierarchy. The advantage of this approach is that it is straightforward and does not require any extra steps like specifying input/output properties or alternate configuration parameters. You may easily expand a subsystem by unmasking it and following the instructions at the following link:

http://www.mathworks.com/help/releases/R2017a/simulink/ug/expand-subsystem-contents-1.html

This will allow you to generate code for a masked subsystem that is not initially at root level

2. Place the low-level subsystems in a referenced model, so that within that referenced model, they are at the root-level. 

This has the advantage that it preserves the model hierarchy and is fairly modular, though it requires some extra work to configure initially. You will need to specify input/output data on the inports and outports of the subsystem in the referenced model. You may find information and examples on Model References conversions in the documentation:

http://www.mathworks.com/help/releases/R2017a/simulink/model-reference.html

http://www.mathworks.com/help/releases/R2017a/simulink/ug/subsystem-to-referenced-model-conversion.html

http://www.mathworks.com/help/releases/R2017a/simulink/ug/convert-a-subsystem-to-a-referenced-model.html

Note that, in the absence of HDL code generation, it is common practice to reference the configuration set of the parent model for consistency. However, since HDL Coder is not compatible with referenced configuration sets, it will be necessary to either manually match the Configuration Parameters, or export the Configuration Set of the parent (main) model, and then load it into the referenced model. This could be done using an PostLoadFcn callback for ease of use. You may find more information on working with Configuration parameters and using callbacks in the following documentation links:

http://www.mathworks.com/help/releases/R2017a/simulink/ug/setting-up-configuration-sets.html

http://www.mathworks.com/help/releases/R2017a/simulink/ug/model-callbacks.html

 *3. Copy the masked subsystem to a new model just for code generation*

If you are just seeking to generate code, another workaround is to simply copy masked subsystems into new models as the root-level. However, to get correct results, you will again need to load a referenced configuration set and specify block input/output types as detailed in (2).