I used fdatool to create VHDL of a lowpass fir filter with Fpass 1KHz and and Fstop 2KHz with sampling freq 20kHz.
I have a 12 bit ADC/DAC with a range from about -1.5V to 1.5V or -2048 to 2048 in signed binary. When I quantize the filter should I make the fraction length 0 so I get the +-2048 range or 10 so I get a range of +- 4V?
I am using a function generator for the input to the ADC.
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