MATLAB: Do I receive an assertion in portmgr.cpp:340 when I try to generate HDL code from the model with a For Each Subsystem block

assertioncodereachforforeachhdlHDL Coderportmanagersimulink

When I try to generate HDL code for my model containing a For Each block in R2017a, I receive an assertion error below. How do I resolve this error?
 
Assertion failed: b:\matlab\src\pir_core\base_core\portmgr.cpp:340:Error: Invalid port index 2 requested when 1 is the max port index for comp foreach17a" RefNum="c18" UserName="For Each Subsystem" RTTIClass ="class pir::ForEachComp" Network="n0"/>

Best Answer

This is a bug associated with the interaction between the 'MinimizeGlobalResets' option and the For Each Subsystem. As a workaround, you can execute the following command:
 
>> hdlset_param('foreach17a', 'MinimizeGlobalResets', 'off')
If you do not want to turn "MinimizeGlobalResets" off, you can also work around this issue by right-clicking on the For Each subsystem block and going to HDL Code > HDL Block Properties. Now change the "FlattenHierarchy" option from "inherit" to "on". For more information, please refer to the following link:
https://www.mathworks.com/help/hdlcoder/ug/hierararchy-flattening.html
 
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