Why do I encounter an error message when I attempt to generate code for a Xilinx System Generator Subsystem?
The error message I am encountering is as follows:
Error: Evaluation of elaborate function on class hdldefaults.XilinxVivadoSystemGeneratorSubsystem failed with the error message: hdlcoder:pirudd:PirUDMethodInfoError: hdlblackbox_com:setInputPortName:invalidIndex: Error: Invalid input port index 5, <Component CtxName = "SimulinkModelName" Refnum="XXX" UserName="SubsystemX" RTTIClass ="class pir::XsgVivadoComp" Network="n0"/> has 6 input port(s)
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