MATLAB: Can I not I set the port I/O mode of the VHDL Cosimulation block to be “INOUT” in Link for ModelSim

configurationEDA Simulator Link MQi/oioinputoutputsettingsvhdl

I would like to change the port I/O Mode of my VHDL Cosimulation block to be "INOUT" in Link for ModelSim. ModelSim allows me to set their direction to be "INOUT" in the VHDL code.

Best Answer

This enhancement has been incorporated in Release 2006b (R2006b). For previous product releases, read below for any possible workarounds:
The ability to define the port's I/O Mode to be "INOUT" is not available in Link for ModelSim.
To work around this issue, specify the same signal as both a Simulink input and Simulink output in the Cosimulation block.
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