One way of approaching a formal proof of this, is by induction, I'll do negation for you, and you can see if you can modify it to do conjunction.
Notice that if you have an expression $\phi$ which is equivalent to $\neg A$, which has any occurrences of any propositional variables other than $A$, then, you can just replace them with $A$. Hence, we only need to consider sentences in $A$ and $\rightarrow$.
Claim: Any sentence in $A$ and $\rightarrow$ evaluates to true, when $A$ is true.
Proof: By induction on the length of the sentence. The base case is the sentence $A$, and clearly this is true with $A$ is true. In the induction step the expression is of the form $\phi \rightarrow \psi$, for some sentences $\phi$ and $\psi$ in only $A$ and $\rightarrow$. Also $\phi$ and $\psi$ are shorter, so, we can apply the induction hypothesis. In particular when $A$ is true $\phi$ and $\psi$ are both true. But then, by the semantics for $\rightarrow$, when $A$ is true $\phi\rightarrow \psi$ is true too.
Q.E.D.
So, any expression we can make preserves truth, and so, can't be equivalent to negation.
The lesson here, I think, is how you deal with a logic gate when one or more inputs of the gate have been wired to a constant $0$ or $1$. This may seem like a silly thing to do, but it has at least two very practical applications I can think of:
When you have to use an off-the-shelf part rather than being able to specify a circuit with exactly the gates you want and no others, you may end up with some superfluous gates (or superfluous inputs to some gates) and you have to "tie off" the extra inputs to something that will allow the circuit to function the way you want despite the unwanted logic.
When there is a manufacturing defect in a digital logic circuit, it often manifests as if one of the outputs of a gate is shorted either to the "$0$" voltage source (e.g., ground) or shorted to the "$1$" voltage source. If you want to devise tests to detect whether such a defect has happened, you have to figure out how the device will behave differently with this constant $0$ or $1$ input to some of its gates instead of the usual logic inputs. Whole textbooks have been written on this problem.
The basic rules are actually quite simple. For example, here's the logic table
for a two-input NAND gate with inputs $X$ and $Y$:
$$\begin{array}{ccc}
X & Y & \mbox{output} \\ \hline
0 & 0 & 1 \\
1 & 0 & 1 \\
0 & 1 & 1 \\
1 & 1 & 0
\end{array}$$
Now what happens if we short $Y$ to the $1$ voltage source is that $Y$ is never $0$,
so the first two lines of the table above become irrelevant. We're left with
$$\begin{array}{ccc}
X & Y & \mbox{output} \\ \hline
0 & 1 & 1 \\
1 & 1 & 0
\end{array}$$
So $X\ \mathrm{NAND}\ 1 = X'$, that is, the NAND gate becomes a simple inverter for the
remaining non-shorted input.
To see the implications for an XOR gate (or any other logic element),
you can write out a similar logic table.
In this case one of the inputs is shorted to $0$, so you can scratch out the
lines where that input is $1$ and see what's left.
Best Answer
It's not saying something particularly deep, just that when you actually do axiomatize these things then a formal proof will require a string of deductions from the axioms. If you want you can build things up in such a way that a (suitably formalized notion of a) Venn diagram constitutes a proof.
EDIT: Reading a bit more of the context (I can only see a limited preview from here), I believe they're trying to motivate the definition of a Boolean algebra by showing that algebras of sets satisfy the Boolean algebra axioms. So you could regard things done with Venn diagrams as proofs in an algebra of sets, but then as Andre Nicolas notes in the comments you can't use Venn diagrams to prove general facts about Boolean algebras since you don't know that every Boolean algebra can be described as an algebra of sets.